Support #63
closedAccess to a second CAN bus
100%
Description
The SolidSense provides an access to one CAN bus through the front panel connector.
Would it be possible to access a second CAN bus through the expansion header of the SolidSense board ?
Updated by Emmanuel Jubera [SAFT] about 1 year ago
- Tracker changed from Feature to Support
Updated by Emmanuel Jubera [SAFT] about 1 year ago
- Assignee changed from Stephane Desneux [IoT.bzh] to Emmanuel Jubera [SAFT]
According to a communication from SolidRun to IoT.bzh in 2021, it is possible to access a second CAN bus via the expansion header of the solidSense board.
More information is to be collected from SolidRun on this topic. Contacts are: pointjc@solidsense-connect.com and pascal.olivier@solidsense-connect.com
Updated by Emmanuel Jubera [SAFT] 11 months ago
Solidrun confirmed the feasibility of this feature and provided us with some indications. One of our engineer is currently developing a daughter board providing the access to a second CAN interface.
Updated by Sebastien Douheret [IoT.bzh] 10 months ago
- Assignee changed from Emmanuel Jubera [SAFT] to Louis-Baptiste Sobolewski
Updated by Louis-Baptiste Sobolewski 5 months ago
- Status changed from New to Resolved
Updated by Aymeric Aillet 5 months ago
CAN¶
Patch provided on our public gitlab: https://git.iot.bzh/saft/datahub/liquidsense/liquidsense-linux-support/-/blob/main/0050-LiquidSense-enable-CAN-LiquidSense-4-MHz-clock.patch
The secondary can interface is available as `can1`.
This patch uses the LiquidSense dedicated 4MHz quartz to clock the
secondary CAN controller bus.
Another patch has to be created if we want to use the 24Mhz SolidSense clock (which is used by SolidSense CAN controller).
This modification involve soldering a resistor to link the LiquidSense CAN controller to this clock.
GPIO expander¶
Patch provided on our public gitlab: https://git.iot.bzh/saft/datahub/liquidsense/liquidsense-linux-support/-/blob/main/0051-LiquidSense-enable-GPIO-expander.patch
The expander appears as /dev/gpiochip5.
It provides 8 I/Os which are labelled and set as inputs by default.
Bits 0 to 3 are classic IOs:
- liquidsense:es1 is bit 0 (untested)
- liquidsense:es2 is bit 1 (untested)
- liquidsense:es3 is bit 2
- liquidsense:es4 is bit 3
Bits 4 to 7 match a dip switch:
- liquidsense:sw1-4 is bit 4
- liquidsense:sw1-3 is bit 5
- liquidsense:sw1-2 is bit 6
- liquidsense:sw1-1 is bit 7
GPIO expander is available on I2C2 bus at address 0x20 (issue in liquidsense manual providing address 0x18)